A novel multilevel inverter with reduced count of power switches

This research paper introduces a novel cascaded multilevel inverter topology designed specifically for single-phase applications. The motivation behind this work stems from the need for more efficient, cost-effective, and space-saving power electronics solutions. Traditional multilevel inverter topologies often require a significant number of power switches and associated driver circuits, leading to increased costs and larger installation spaces. Our goal was to address these challenges by proposing a topology that offers distinct advantages over existing solutions.

One of the main motivations for this research is the reduction in the count of power switches and driver circuits required for operation. By streamlining the design, our proposed topology significantly lowers the overall cost of the inverter system. This reduction in components also minimizes the required installation space, making it a more practical and economical choice for various applications, from renewable energy systems to industrial drives.

The addition of an H-bridge to the proposed basic unit further enhances the efficiency of our topology. This addition allows the inverter to generate only positive levels at its output, simplifying the design while maintaining performance. Compared to other inverter topologies, our structure requires fewer DC voltage sources and driver circuits, making the system architecture more straightforward and easier to implement.

Another key motivation for this research is the versatility of our proposed topology. At the output voltage, the final inverter structure is capable of producing all voltage levels, both positive and negative. This versatility ensures compatibility with various load requirements, making it suitable for a wide range of applications.

To validate the functionality and performance of our proposed topology, extensive simulations were conducted. The results of these simulations, particularly for three cascaded stages of the basic unit generating 37 levels at the output, demonstrate the effectiveness and feasibility of our design. The simulations serve as a validation of our approach and highlight the practicality of implementing this topology in real-world applications.

In summary, this research paper presents a novel cascaded multilevel inverter topology tailored for single-phase applications. The motivations driving this work include the need for more efficient and cost-effective power electronics solutions, as well as the desire to reduce the required installation space. Through reduced component count, simplified architecture, and versatile output capabilities, our proposed topology offers a promising solution for various industrial and renewable energy applications.

Use the link to read full research paper: https://ieeexplore.ieee.org/document/7274918